Storage system and control method therefor

ABSTRACT

A storage system includes a controller, first, second, and third bridges connected to the controller at least in part in a cascade manner, and a plurality of storage devices, each storage device connected to a bridge from among the first, second, and third bridges. At least one of the controller and the first, second and third bridges includes a memory configured to store information including a connection configuration of each of the bridges and the storage devices, a determination unit configured to determine whether the connection configuration of the bridges and the plurality of storage devices connected thereto has been changed from the connection configuration at the time of a previous operation, based on the information stored in the memory, and a re-setting unit configured to, if the connection configuration is determined to have been changed, re-set an operation mode of each of the bridges according to the change in the connection configuration.

BACKGROUND Field

The present disclosure relates to a storage system and a control methodtherefor.

Description of the Related Art

An information processing apparatus such as an image forming apparatusin the form of a multifunction peripheral (MFP) is equipped with astorage device for storing a program for the apparatus and image data ofa user therein. Examples of the storage device include a hard disk drive(HDD) and a solid state drive (SSD).

Conventionally, a storage system has been controlled by implementing amethod using, for example, Serial Advanced Technology Attachment (SATA)which has been established as an interface standard for storage devices.

For example, a control method is known in which a storage controlapparatus with two HDDs connected thereto has a plurality of operationmodes and the storage control apparatus transfers data while switching atransfer method by switching the operation mode.

Japanese Unexamined Patent Application Publication (Translation of PCTApplication) No. 2011-515749 discusses a control method for connecting,to a SATA bridge connected to a main controller on a host side andfunctioning as a port multiplier on a device side, further SATA bridgesat a plurality of stages in a cascade manner to expand the functionalityof the port multiplier.

In a storage system having a plurality of operation modes and includingthe SATA bridges connected in the cascade manner as discussed inJapanese Unexamined Patent Application Publication (Translation of PCTApplication) No. 2011-515749, for example, any of a plurality of storagedevices connected to the storage system further beyond the SATAbridge(s) may be replaced with another storage device. In this case,maintaining the same operation mode of the SATA bridge as before thereplacement may result in an operation mode that is incompatible withthe storage device connected to the storage system after thereplacement. Further, the operation mode of the SATA bridges connectedin the cascade manner may also become incompatible with the new storagedevice connected to the storage system after the replacement.

If a mismatch occurs between the operation mode of a bridge and thestorage device connected to the bridge in this manner, the bridgebecomes unable to operate normally. Further, a mismatch may also occurin the operation mode among the bridges connected in the cascade manner,and such a mismatch may also result in a failure to continue normaloperations.

SUMMARY

The present disclosure is directed to a storage system and a controlmethod having a configuration described below to solve theabove-described problem.

According to various embodiments of the present disclosure, a storagesystem includes a controller, a first bridge connected to thecontroller, a second bridge and a third bridge connected to the firstbridge, a plurality of storage devices each connected to the secondbridge or the third bridge, a memory configured to store informationincluding a connection configuration of the plurality of storagedevices, a determination unit configured to determine whether theconnection configuration of the plurality of storage devices has beenchanged, based on the information stored in the memory, and a re-settingunit configured to re-set at least one of an operation mode of the firstbridge, an operation mode of the second bridge, or an operation mode ofthe third bridge based on the connection configuration after the change,based on the determination that the connection configuration has beenchanged.

Further features will become apparent from the following description ofexemplary embodiments with reference to the attached drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram illustrating a configuration of an entireinformation processing apparatus.

FIG. 2 is a block diagram illustrating a detailed configuration of amain controller according to an exemplary embodiment.

FIG. 3 is a block diagram illustrating a detailed configuration of abridge according to the exemplary embodiment.

FIG. 4 is a block diagram illustrating detailed configurations ofbridges connected in a cascade manner according to the exemplaryembodiment.

FIG. 5 is a state transition diagram illustrating a state transition ofthe bridge according to the exemplary embodiment.

FIGS. 6A and 6B are a flowchart of initialization processing performedby the main controller according to the exemplary embodiment, and aflowchart of initialization processing performed by the bridge accordingto the exemplary embodiment.

FIGS. 7A and 7B are a flowchart of mode re-setting processing performedby the main controller according to the exemplary embodiment, and aflowchart of mode re-setting processing performed by the bridgeaccording to the exemplary embodiment.

DESCRIPTION OF THE EMBODIMENTS

An exemplary embodiment of the present disclosure will be describedbelow in detail with reference to the drawings by way of example.However, components and features that are described in this exemplaryembodiment are merely cited as examples, and are not intended to limitthe scope of the present invention only to embodiments which includethese components or features.

FIG. 1 is a block diagram illustrating a configuration of an entireinformation processing apparatus including a storage system according toa first exemplary embodiment of the present disclosure. The presentexemplary embodiment will be described based on an example in which thepresent exemplary embodiment is applied to an image forming apparatussuch as a multifunction peripheral (MFP) as one example of theinformation processing apparatus, but is not limited thereto and can beapplied to an information processing apparatus configured to include aplurality of storage devices. Especially, the present exemplaryembodiment can be effectively applied to an information processingapparatus configured to include bridges connected in a cascade mannerand a plurality of storage devices connected to them.

The information processing apparatus according to the present exemplaryembodiment illustrated in FIG. 1 includes a main controller 100, aplurality of storage devices storing data therein, such as four storagedevices 400, 401, 402, and 403, and a plurality of bridges, such asthree bridges 200, 300, and 310. The bridges 200, 300, and 310 transmitand receive data to and from these storage devices 400, 401, 402, and403. The main controller 100 controls the entire information processingapparatus, and also controls an MFP therein.

In the present exemplary embodiment, the storage device 1 (400) and thestorage device 2 (401) are each a first type storage device having afunction of storing data not requiring a high access speed, e.g, anonvolatile storage device including a disk in the present exemplaryembodiment. In other words, the first type storage device is anonvolatile storage device involving disk access, and is, for example, ahard disk drive (HDD: HDD 1 and HDD 2). Further, the storage device 3(402) and the storage device 4 (403) are each a second type storagedevice having a function of storing data requiring a high access speedtherein, e.g., a nonvolatile storage device including a semiconductormemory in the present exemplary embodiment. In other words, the secondtype storage device is a storage device including a semiconductor flashmemory, such as a solid state drive (SSD), and is assumed to be an SSD(an SSD 1 and an SSD 2) in the present exemplary embodiment. However,the first type storage device and the second type storage device are notlimited to the HDD and the SSD, respectively. Further, the definitionsconcerning the first type storage device and the second type storagedevice are also merely examples, and the storage devices are not limitedto these examples.

Further, the number of bridges is assumed to be three in the presentexemplary embodiment, but the number is not limited thereto and thepresent exemplary embodiment can also support a configuration in whichat least one of the bridges 300 and 310 is removed and/or anot-illustrated bridge is further additionally connected.

FIG. 2 illustrates a specific configuration example of the maincontroller 100 serving as a host.

The main controller 100 includes a central processing unit (CPU) 101, aread only memory (ROM) 102, a dynamic random access memory (DRAM) 103,various kinds of image processing units, such as a scanned imageprocessing unit 105 and a printer image processing unit 107, a scanner106, a printer 108, and an operation unit 109. These components form theMFP. The main controller 100 further includes a Network 104 and a SerialAdvanced Technology Attachment (SATA) controller 110.

The CPU 101 has a function to control the main controller 100 and theentire information processing apparatus, and executes system control,calculation processing, an operating system (OS), and an application.

The ROM 102 is a read-only memory, and stores a control program to beexecuted by the CPU 101 and setting information. The DRAM 103 stores thecontrol program executed by the CPU 101, and also functions as atemporary work area. The Network 104 is a network interface (I/F), andtransmits image data subjected to image processing in the MFP to anexternal information apparatus (not illustrated) via a local areanetwork (LAN) 111. Alternatively, the Network 104 inputs image data fromthe external information apparatus.

The scanner 106 is an image input device. The scanner 106 acquiresraster image data by irradiating an image on paper set as an originaldocument with light and scanning it with a charge coupled device (CCD)line sensor (not illustrated), and converts the acquired data into anelectric signal and then outputs it.

The scanned image processing unit 105 performs image processing on theimage data of the electric signal that is received from the scanner 106.The image data subjected to the image processing is stored into any ofthe storage devices 400 to 403 via the SATA controller 110, the bridge200.

The printer image processing unit 107 performs image processing on thereceived image data, and transmits the image data subjected to the imageprocessing to the printer 108. The printer 108 is an image outputdevice, and prints the received image data (e.g., raster image data) ona sheet as an image.

The operation unit 109 is a user interface device, such as a touch panelhaving both a display function and an operation function. The operationunit 109 has a function of displaying the image data input to the maincontroller 100, a function of notifying the CPU 101 of information inputby a system operator (a user), and the like.

The SATA controller 110 controls a device connected to the SATAcontroller 110, such as the bridge 200, in compliance with the SATAstandard, and transmits and receives data to and from the bridge 200 andthe like, under control by the CPU 101.

FIG. 3 illustrates a detailed configuration example of the bridge 200.

A CPU 201 of the bridge 200 performs system control, calculationprocessing, ATA command processing, and the like in the bridge 200, andalso performs, for example, processing of a transmission commanddirected to the storage devices 400 to 403 and the bridges 300 and 310.A ROM 202 stores a control program to be executed by the CPU 201 anddata of setting values of various kinds of modes. A RAM 203 stores thecontrol program to be executed by the CPU 201, and also functions as atemporary work area.

A SATA device I/F 204 is connected to the main controller 100, andcommunicates with the SATA controller 110 in the main controller 100 incompliance with the SATA standard. SATA host I/Fs 205 and 206 arerespectively connected to the bridges 300 and 310 and communicate withthe bridges 300 and 310 in compliance with the SATA standard.

FIG. 4 illustrates detailed configuration examples of the bridge 200 andthe bridge 300 connected in a cascade manner, and the bridge 310 alsoconnected to the bridge 200 in the cascade manner. The bridges 200, 300,and 310 will be described assuming that they have a same configuration,but embodiments of the present disclosure are not limited to theseconfigurations. Needless to say, a function may be added or removed in apart of the bridges 200, 300, and 310 within a range that remains withinthe scope of the present disclosure.

A CPU 301 of the bridge 300 performs system control, calculationprocessing, and ATA command processing, and also performs, for example,processing of a transmission command directed to the storage device 400and the storage device 401. A ROM 302 stores a control program to beexecuted by the CPU 301 and data of setting values of the various kindsof modes. A RAM 303 stores the control program to be executed by the CPU301, and also functions as a temporary work area.

A SATA device I/F 304 is connected to the bridge 200, and communicateswith the SATA host I/F 205 in the bridge 200 in compliance with the SATAstandard.

SATA host IfFs 305 and 306 are connected to devices, i.e., the storagedevices 400 and 401 in the present exemplary embodiment, and communicatewith the storage devices 400 and 401 in compliance with the SATAstandard, respectively.

Similarly, a CPU 311 of the bridge 310 performs system control,calculation processing, and ATA command processing, and also performs,for example, processing of a transmission command directed to thestorage device 402 and the storage device 403. A ROM 312 stores acontrol program of the CPU 311 and data of setting values of the variouskinds of modes therein. A RAM 313 stores the control program executed bythe CPU 311 therein, and also functions as a temporary work area.

A SATA device I/F 314 is connected to the bridge 200, and communicateswith the SATA host I/F 206 in the bridge 200 in compliance with the SATAstandard.

SATA host I/Fs 315 and 316 are respectively connected to devices, i.e.,the storage devices 402 and 403 in the present exemplary embodiment, andcommunicate with the storage devices 402 and 403 in compliance with theSATA standard.

The bridges 200, 300, and 310 will be described as SATA bridgesconnected via SATA interfaces in the present exemplary embodiment, butembodiments of the present disclosure are not limited to theseconfigurations. Each of the bridges 200, 300, and 310 may be anotherinterface, such as Peripheral Component Interconnect Express (PCIE).

Further, the SATA controller 110 and the bridges 200, 300, and 310 willbe described assuming that they are configured on different chipsindividually in the present exemplary embodiment, but embodiments of thepresent disclosure are not limited to these configurations. For example,any two or more of the SATA controller 110 and the bridges 200, 300, and310 may be configured to be included in the same chip in otherembodiments of the present disclosure.

FIG. 5 is a state transition diagram illustrating a state transition ofeach of the bridges 200, 300, and 310 according to the first exemplaryembodiment.

Now, an operation of each of the bridges 200, 300, and 310 will bedescribed with reference to FIG. 5.

This operation will be described with reference to FIG. 4 focusing onthe operation of the bridge 300 as a representative example, but theother bridges 200 and 310 also operate in a similar manner. Further,this operation will be described assuming that the HDDs are used as thestorage devices 400 and 401 connected to the bridge 300.

Each of the bridges 200, 300, and 310 has three operation modes, i.e., asingle mode (S501), a mirroring mode (S502), and a hybrid mode (S503).

The single mode (S501) is a mode in which the bridge operates with theHDD mounted only on one SATA host I/F thereof. In a case of the bridge300, the single mode (S501) is a mode in which the bridge 300 operateswith the HDD connected to only any one of the SATA host I/F 305 and theSATA host I/F 306.

The CPU 301 transitions to a mirror state (S504) if receiving atransition command to the mirroring mode (S502) from the host side(bridge 200 side) via the SATA device I/F 304 in the single mode (S501).

Further, the CPU 301 transitions to a hybrid state (S508) if receiving atransition command to the hybrid mode (S503) from the host side via theSATA device I/F 304 in the single mode (S501).

When transitioning to each of the states, the CPU 301 stores the stateto which the CPU 301 has transitioned into the ROM 302. The single mode(S501) is a default operation mode, and the CPU 301 starts operating inthe single mode (S501) if the mode at the time of a previous operation(at the time of initialization such as a startup or at the time ofaccess to the device) is not stored in the ROM 302 upon a startup.

Alternatively, if the mode at the time of the previous operation isstored in the ROM 302 upon the startup, the CPU 301 starts operating inthis stored operation mode.

The mirroring mode (S502) is a mode in which the bridge 300 operateswith the HDD mounted on each of the two SATA host IFs 305 and 306.

The mirroring mode (S502) includes four states, i.e., the mirror state(S504), a degraded state (S505), a rebuild state (S506), and a haltstate (S507).

In the mirroring mode (S502), the CPU 301 treats one of the HDDsrespectively connected to the two SATA host I/Fs 305 and 306 as a masterHDD, and the other of them as a slave HDD.

The mirror state (S504) is a state in which both the HDDS are in normaloperation with the HDDs mounted on the two SATA host I/Fs 305 and 306.

In the mirror state (S504), if receiving a command to read out data fromthe host side via the SATA device I/F 304, the CPU 301 executes thiscommand, targeting only the master HDD of the HDDs connected to the SATAhost I/Fs 305 and 306.

In the mirror state (S504), if receiving a data write command from thehost side via the SATA device I/F 304, the CPU 301 executes thiscommand, targeting the HDDs connected to the SATA host I/Fs 305 and 306.In other words, the CPU 301 executes this command, targeting both themaster HDD and the slave HDD.

The CPU 301 transitions to the degraded state (S505) if an abnormalitysuch as a failure has occurred in any one of the master HDD and theslave HDD in the mirror state (S504).

The CPU 301 transitions to the rebuild state (S506) if receiving atransition command to the rebuild state (S506) from the host side viathe SATA device I/F 304 in the mirror state (S504).

The degraded state (S505) is a state in which the CPU 301 detects anabnormality such as a failure in the HDD connected to one of the SATAhost I/Fs and stops the access to this HDD, and is in operation with useof only the normal HDD connected to the other of the SATA host I/Fs.

The CPU 301 transitions to the rebuild state (S506) if detecting that anormal HDD is newly connected to the SATA host I/F instead of the failedHDD in the degraded state (S505).

The CPU 301 transitions to the halt state (S507) if detecting that bothof the HDDs connected to the SATA host I/Fs 305 and 306 are abnormal inthe degraded state (S505). This situation corresponds to a case, forexample, in which the HDD connected to the other of the SATA host I/Fs305 and 306 has also failed.

The rebuild state (S506) is a state in which the bridge is in operationwith use of only one of the HDDs (the HDD that has been mounted sincebefore the failure and has not failed), but is a state in which thebridge is copying (rebuilding) the data to the other of the HDDs (HDDnewly mounted instead of the failed HDD).

At this time, the CPU 301 treats the HDD from which the data is copied(the HDD that has been mounted since before the failure and has notfailed) as the master HDD, and the HDD to which the data is copied (theHDD newly mounted instead of the failed HDD) as the slave HDD.

The CPU 301 transitions to the mirror state (S504) if the rebuilding iscompleted in the rebuild state (S506). The CPU 301 transitions to thedegraded state (S505) if the slave HDD has failed in the rebuild state(S506). On the other hand, the CPU 301 transitions to the halt state(S507) if the master HDD has failed in the rebuild state (S506).

The halt state (S507) is a state in which the bridge becomes unable tocontinue the mirroring operation because both of the HDDs are broughtinto an abnormal state.

The HDDs have been cited as examples of the devices connected to theSATA host I/Fs 305 and 306 in the present exemplary embodiment, but thesame also applies to a case in which the connected devices are SSDs orbridges.

In a case where the devices connected to the SATA host I/Fs 305 and 306are the SSDs, the CPU 301 determines that an abnormal device isconnected when the SSD itself, for example, has failed, similar to acase where the connected devices are the HDDs.

In a case where the devices connected to the SATA host I/Fs 305 and 306are the bridges, the CPU 301 determines that an abnormal device isconnected when being notified that this bridge is in an abnormal statedue to, for example, a failure.

The hybrid mode (S503) is a mode in which the CPU 301 operates in such astate that different types of storage devices, in particular, an HDD andan SSD in the present example are mounted on the two SATA host I/Fs 305and 306.

The hybrid mode (S503) includes two states, i.e., the hybrid state(S508) and an error state (S509).

In the hybrid mode (S502), the CPU 301 integrates addresses with respectto the HDD and the SSD connected to the two SATA host I/Fs 305 and 306,and operates so as to cause them to appear as if they are one storagedevice as viewed from the host side via the SATA device/F 304.

The hybrid state (S508) is a state in which, with the HDD and the SSDmounted on the two SATA host I/Fs 305 and 306, these HDD and SSD are innormal operation.

The CPU 301 transitions to the error state (S509) if an abnormality suchas a failure has occurred in any one of the HDD and the SSD in thehybrid state (S508).

The error state (S509) is a state in which the bridge becomes unable tocontinue the hybrid operation because any one of the HDD and the SSD isbrought into an abnormal state.

Initialization processing targeting the SATA device connected to theSATA controller 110 that is performed by the CPU 101 in the maincontroller 100 according to the present exemplary embodiment will bedescribed with reference to a flowchart illustrated in FIG. 6A.

A program running on the CPU 101 regarding the flowchart illustrated inFIG. 6A may be stored in the DRAM 103, the ROM 102, or any of thestorage devices 400 to 403.

The initialization processing will be described assuming that the CPU101 in the main controller 100 performs this processing in the presentexemplary embodiment, but the present processing may be set so as to beperformed by any of the bridges 200, 300, and 310.

The processing illustrated in the flowchart of FIG. 6A will be describedassuming that this processing is performed at the time of theinitialization such as the startup, but is not limited thereto. Thisprocessing procedure may be performed when the CPU 101 accesses the SATAdevice connected to the SATA controller 110, for example, every time theCPU 101 attempts this access.

First, in step S601, the CPU 101 confirms whether there is a deviceconnected to the SATA controller 110, in this case, whether a SATAdevice is connected to the device side via the SATA controller 110. As aspecific example thereof, the CPU 101 issues an ATA command such as anIDENTIFY DEVICE command to the device side via the SATA controller 110,thereby confirming whether a SATA device is connected. In other words,the CPU 101 transmits a notification for confirming whether there is aconnected device to the device side via the SATA controller 110.

If there is a response to the IDENTIFY DEVICE command issued in stepS601 from the device side via the SATA controller 110 (YES in stepS602), the CPU 101 determines that a device is connected to the SATAcontroller 110. In other words, the CPU 101 determines that a SATAdevice is connected to the SATA controller 110, and the processingproceeds to step S603.

On the other hand, if there is no response to the IDENTIFY DEVICEcommand from the device side (NO in step S602), the CPU 101 determinesthat no device is connected to the SATA controller 110, i.e., no SATAdevice is connected, and the processing proceeds to step S605. In stepS605, the CPU 101 presents an error display on the operation unit 109,indicating that no device is connected to the SATA controller 110. Afterthat, the processing may proceed to step S610, and the CPU 101 mayoperate so as to store information acquired in step S602 into the ROM102.

In step S603, the CPU 101 determines whether a bridge is connected tothe SATA controller 110 as the SATA device based on a content of theresponse to the IDENTIFY DEVICE command issued in step S601.

In step S603, if the CPU 101 determines that a bridge (the bridge 200 inthe specific example illustrated in FIG. 2) is connected to the SATAcontroller 110 (YES in step S603), the processing proceeds to step S604.

On the other hand, if the CPU 101 determines that not the bridge but astorage device is connected to the SATA controller 110 in step S603 (NOin step S603), the processing proceeds to step S609. In step S609, theCPU 101 performs initialization processing, which will be describedbelow, on this storage device.

In step S604, the CPU 101 determines whether there is further aconnected device beyond the bridge 200 connected to the SATA controller110 based on the content of the response to the IDENTIFY DEVICE commandissued in step S601.

If the CPU 101 determines that there is further a connected devicebeyond the bridge 200 in step S604 (YES in step S604), the processingproceeds to step S606. If the CPU 101 determines that there is noconnected device in step S604 (NO in step S604), the processing proceedsto step S605.

The content of the response to the IDENTIFY DEVICE command containswhether there is a connected device, and, if there is a connecteddevice, also contains information about this connected device togethertherewith. More specifically, as the connected device, the content ofthe response contains setting information and the operation mode of eachof the bridges 300 and 310, a connection relationship (also referred toas a connection configuration) among the bridges 300 and 310 and thestorage devices 400 to 403 connected thereto, the type of each of thestorage devices 400 to 403 in the specific example illustrated in FIG.1.

In step S605, the CPU 101 presents an error display on the operationunit 109, indicating that a device connected to the bridge 200 or beyondthe bridge 200 cannot be detected. Then, the processing proceeds to stepS610. In step S610, the CPU 101 stores, for example, the settinginformation of the bridge 200 acquired from the connected deviceinformation contained in the content of the response to the IDENTIFYDEVICE command into the ROM 102 as connection configuration information.

In step S606, the CPU 101 determines whether a bridge is connected tothe SATA controller 110 in the cascade manner based on the content ofthe response to the IDENTIFY DEVICE command issued in step S601. In thiscase, examples of a bridge being connected in the cascade manner includewhen at least one of the bridges 300 and 310 is connected beyond thebridge 200 as illustrated in FIG. 1.

In step S606, if the CPU 101 determines that a bridge is connected tothe SATA controller 110 in the cascade manner (YES in step S606), theprocessing proceeds to step S608.

On the other hand, in step S606, if the CPU 101 determines that only thebridge 200 is connected to the SATA controller 110 and no cascadeconnection is established (NO in step S606), the processing proceeds tostep S607.

In step S607, the CPU 101 re-sets the operation mode of the bridge 200by transmitting a mode setting instruction to the bridge 200 via theSATA controller 110 based on the connected device information containedin the content of the response from the device side. More specifically,the CPU 101 determines the operation mode of each bridge based on theconnection relationship (connection configuration) between each bridgeand each storage device and the type of each storage device that arecontained in the connected device information, and sets the determinedoperation mode to each bridge. At this time, the operation mode set tothe bridge 200 is either the mirroring mode S502 or the hybrid modeS503.

As a specific example, the CPU 101 sets the mirroring mode S502 if twostorage devices connected to the bridge 200 are the same type of storagedevices (e.g., HDDs or SSDs). On the other hand, the CPU 101 sets thehybrid mode S503 if the two storage devices connected to the bridge 200are different types of storage devices (e.g., an HDD and an SSD).

Then, the processing proceeds to step S609. In step S609, the CPU 101transmits an initialization processing instruction targeting theconnected storage device from the SATA controller 110 to the bridge 200,thereby performing the initialization processing on the storage device.

Needless to say, the CPU 101 may operate so as to re-set the single modeS501 if only one storage device is connected to the bridge 200.

In step S608, the CPU 101 transmits the mode setting instruction to eachof the bridges connected in the cascade manner via the SATA controller110, thereby re-setting the operation mode of each of the bridges. Inthe present exemplary embodiment, assume that the three bridges 200,300, and 310 are connected in the cascade manner, and the two storagedevices are connected to each of the bridges 300 and 310 as illustratedin FIG. 1. At this time, the operation modes set to the bridges 200,300, and 310 are both the mirroring mode S502 and the hybrid mode S503.

As a specific example, the CPU 101 sets the mirroring mode S502 to thebridge 300 if both the two storage devices 400 and 401 connected to thebridge 300 are the first type storage devices (HDD 1 and HDD 2), whichare the same type of storage devices, like the configuration illustratedin FIG. 1. Similarly, the CPU 101 sets the mirroring mode S502 to thebridge 310 if both the two storage devices 402 and 403 connected to thebridge 310 are the second type storage devices (SSD 1 and SSD 2), whichare the same type of storage devices. Therefore, in this case, the CPU101 sets the hybrid mode S503 to the bridge 200.

As another specific example, the CPU 101 sets the hybrid mode S503 toeach of the bridges 300 and 310 if the two storage devices connected toeach of the bridges 300 and 310 are the different types of storagedevices, such as the HDD and the SSD. Thus, in this case, the CPU 101sets the mirroring mode S502 to the bridge 200. In this manner, matchingis maintained between the operation modes of the bridges 200, 300, and310 and the combinations of the storage devices connected to them.

In step S609, the CPU 101 transmits the initialization processinginstruction targeting the storage devices 400 to 403 connected to thebridges 300 and 310 from the SATA controller 110 to the bridge 200,thereby performing the initialization processing on the storage devices400 to 403.

Next, in step S610, the CPU 101 stores, as the connection configurationinformation, information about the connected device(s) connected beyondthe SATA controller 110 that is contained in the content of the responseto the IDENTIFY DEVICE command from the device side. At this time, theconnection configuration information refers to the connectionrelationship (connection configuration) between each of the bridges andthe storage devices, the type of each of the storage devices, theoperation mode and the setting information of each of the bridges, andthe like, and is stored into the ROM 102 or any of the storage devices400 to 403.

In the present exemplary embodiment, the example using the IDENTIFYDEVICE command has been described as the method for confirming theconnected device configuration. However, the method for confirming thedevice configuration is not limited thereto, and any method may beemployed as long as the employed method allows the CPU 101 to confirmwhether there is a SATA device and the like, confirm whether there is abridge and the like, and whether bridges are connected in the cascademanner and the like. Further, the method for confirming the connecteddevice configuration is not limited to the ATA command, and an expansioncommand or the like may be issued.

Next, initialization processing performed by each of the bridges 200,300, and 310 on the SATA devices connected to them according to thepresent exemplary embodiment will be described with reference to aflowchart illustrated in FIG. 6B.

In the present exemplary embodiment, initialization processing performedby the CPU 201 in the bridge 200 will be described as one example, butthe present processing is also performed by the other bridges 300 and310 in a similar manner.

A program running on the CPU 201 regarding the flowchart illustrated inFIG. 6B may be stored in the RAM 203, the ROM 202, or any of the storagedevices 400 to 403.

The processing illustrated in the flowchart of FIG. 6B will be describedassuming that this processing is performed at the time of theinitialization such as the startup, but is not limited thereto and maybe performed when the CPU 201 accesses the SATA device connected to thebridge, for example, every time the CPU 201 attempts this access.

First, in step S621, the CPU 201 receives the notification forconfirming whether there is a connected device from the host side (SATAcontroller 110) via the SATA device I/F 204. Then, the CPU 201 confirmswhether a SATA device is connected beyond the SATA host I/Fs 205 and206. As a specific example, the CPU 201 issues an ATA command such as anIDENTIFY DEVICE command to the device side via each of the SATA hostI/Fs 205 and 206, thereby confirming whether a SATA device is connected.

If there is a response to the IDENTIFY DEVICE command issued in stepS621 from the device side via the SATA host I/Fs 205 and 206 (YES instep S622), the CPU 201 determines that there is a SATA device beyondthe SATA host I/Fs 205 and 206. After that, the processing proceeds tostep S623.

On the other hand, if there is no response to the IDENTIFY DEVICEcommand issued in step S621 from the device side (NO in step S622), theCPU 201 determines that no device is connected to the SATA host I/Fs 205and 206. In other words, the CPU 201 determines that no SATA device isconnected to the SATA host I/Fs 205 and 206, and the processing proceedsto step S627.

In step S623, the CPU 201 determines whether an error notificationindicating that no device is connected to the SATA host I/Fs 205 and 206is contained in the response to the IDENTIFY DEVICE command issued instep S621 from the device side. In step S623, if the CPU 201 determinesthat the error notification is contained in the response to the IDENTIFYDEVICE command from the device side (YES in step S623), the processingproceeds to step S627.

On the other hand, in step S623, if the CPU 201 determines that theerror notification is not contained in the response to the IDENTIFYDEVICE command from the device side (NO in step S623), the processingproceeds to step S624.

In step S627, the CPU 201 notifies the host side that the current stateis such an error state that no device is connected to the SATA host I/Fs205 and 206. With this notification, the main controller 100 presentsthe error display on the operation unit 109, indicating that no deviceis connected to the SATA host I/Fs 205 and 206. After that, theprocessing may proceed to step S628, and the CPU 201 may operate so asto store the information about the connected device acquired in stepS622 into the ROM 202 as the connection configuration information.

In step S624, the CPU 201 acquires the information about the connecteddevices by merging the content of the response to the IDENTIFY DEVICEcommand issued in step S621 from the device side and information aboutthe bridge 200 itself. In step S624, the CPU 201 further returns theconnected device information to the host side via the SATA device I/F204.

The content of the response from the device side contains the connecteddevice information of the SATA device connected to the bridge 200, i.e.,the setting information of the bridges 300 and 310, the connectionconfiguration and the types of the storage devices 400 to 403 connectedto these bridges 300 and 310, in the example illustrated in FIG. 1.

After that, in step S625, the CPU 201 receives the mode settinginstruction from the host side responding to the connected deviceinformation that the host side has been notified of via the SATA deviceI/F 204.

Further, the CPU 201 identifies a content of a mode setting instructionaddressed to the bridge 200 and contents of mode setting instructionsaddressed to the devices connected to the SATA host I/Fs 205 and 206(addressed to the bridges 300 and 310 in the specific exampleillustrated in FIG. 1) based on the received mode setting instruction.

Next, in step S625, the CPU 201 sets the operation mode of the bridge200 itself according to the identified mode setting instructionaddressed to the bridge 200. Further, the CPU 201 notifies the bridges300 and 310 of the contents of the identified mode setting instructionsaddressed to the devices connected to the SATA host I/Fs 205 and 206 viathe SATA host I/Fs 205 and 206. By this notification, the operationmodes of the bridges 300 and 310 are set according to these mode settinginstructions.

After that, in step S626, the CPU 201 receives the initializationprocessing instruction targeting the storage devices 400 to 403 from thehost side via the SATA device I/F 204. Then, the CPU 201 notifies thedevices connected to the SATA host I/Fs 205 and 206 of the receivedinitialization processing instruction. In response to this notification,the initialization processing is performed on the storage devices 400 to403 connected to the bridges 300 and 310.

Next, in step S628, the CPU 201 stores the operation mode of the bridge200 that has been set in step S625 and the information about theconnected devices that has been acquired in step S622 into the ROM 202as the connection configuration information.

In this manner, the initialization processing in the bridge 200 isended.

The initialization processing is also performed in the other bridges 300and 310 connected to the bridge 200 in a similar manner.

Processing for re-setting the mode of the device connected to the SATAcontroller 110 that is performed by the CPU 101 in the main controller100 according to the present exemplary embodiment will be described withreference to a flowchart illustrated in FIG. 7A.

A program running on the CPU 101 regarding the flowchart illustrated inFIG. 7A may be stored in the DRAM 103, the ROM 102, or any of thestorage devices 400 to 403.

The mode re-setting processing according to the present flowchart willbe described assuming that the CPU 101 in the main controller 100performs this processing in the present exemplary embodiment, but thepresent processing may be set so as to be performed by any of thebridges 200, 300, and 310.

The processing procedure illustrated in FIG. 7A will be describedassuming that this processing is performed at the time of theinitialization such as the startup in the present exemplary embodiment,but is not limited thereto and may be performed when the CPU 101accesses the connected SATA device, for example, every time the CPU 101attempts this access.

First, in step S701, the CPU 101 issues the ATA command such as theIDENTIFY DEVICE command to the device side via the SATA controller 110,thereby confirming whether a SATA device is connected. In other words,the CPU 101 transmits a notification for confirming whether there is aconnected device to the device side and the like via the SATA controller110.

If there is a response to the IDENTIFY DEVICE command issued in stepS701 from the device side (YES in step S702), the CPU 101 determinesthat a device is connected to the SATA controller 110. In other words,the CPU 101 determines that a SATA device is connected to the SATAcontroller 110, and the processing proceeds to step S703.

On the other hand, if there is no response to the IDENTIFY DEVICEcommand issued in step S701 from the device side (NO in step S702), theCPU 101 determines that no device is connected to the SATA controller110. In other words, the CPU 101 determines that no SATA device isconnected to the SATA controller 110, and the processing proceeds tostep S704.

In step S704, the CPU 101 presents an error display on the operationunit 109, indicating that no device is connected to the SATA controller110, i.e., no SATA device can be detected on the device side. Then, theCPU 101 ends the processing. The CPU 101 may operate so as to end theprocessing after storing the information acquired in step S702 into theROM 102.

In step S703, the CPU 101 compares the content of the response to theIDENTIFY DEVICE command issued in step S701 from the device side and theconnection configuration at the time of the previous startup that hasbeen stored into the ROM 102 or the like during the initializationprocessing illustrated in FIG. 6A. In the present exemplary embodiment,assume that the connection configuration at the time of the previousstartup that has been stored in the ROM 102 or the like indicates theconnection configuration among the bridges 200, 300, and 310, theconnection configuration of the storage devices 400 to 403, and aconnection configuration between these bridges and storage devices, asindicated by the specific example illustrated in FIG. 1. Further, assumethat the content of the response from the device side also indicates theconnection configuration among the devices connected to the SATAcontroller 110, i.e., the bridges 200, 300, and 310, the connectionconfiguration among the storage devices 400 to 403, and the connectionconfiguration of these bridges and storage devices.

If the CPU 101 determines that there is no change between the connectionconfiguration of the bridges and the storage devices at the time of theprevious startup and the connection configuration indicated by thecontent of the response to the IDENTIFY DEVICE command issued in stepS701 from the device side (NO in step S703), the processing proceeds tostep S706. No change in the connection configuration means that there isno change at all in the connection relationship among the bridges 200,300, and 310 connected to the SATA controller 110 and the connectionconfiguration of the bridges 300 and 310 and the storage devices 400 to403 in the specific example illustrated in FIG. 1. In other words, thechange in the connection configuration refers to a change in theconnection configuration among the bridges or the connectionconfiguration between the bridges and the storage devices, an exchangeof at least a part of the storage devices connected to the bridges foreach other, a removal of the storage device or an additional connectionof a new storage device, and the like. Further, the change in theconnection configuration also includes a case in which a part of thestorage devices connected to the bridges is replaced with a new storagedevice.

Thus, when there is no change at all in the connection configuration,the operation mode of each of the bridges 200, 300, and 310 is neitherchanged.

In step S706, the CPU 101 starts up each of the bridges 200, 300, and310 while maintaining the configuration and the operation modes at thetime of the previous startup, assuming that there is no change at all inthe connection configuration of the bridges 200, 300, and 310 connectedto the SATA controller 110 and the storage devices 400 to 403. Afterthat, the CPU 101 ends the processing. The CPU 101 may operate so as toend the processing after storing the information acquired in step S702into the ROM 102 or the like.

On the other hand, if the CPU 101 determines that there is a changebetween the connection configuration of the storage devices and thebridges at the time of the previous startup and the connectionconfiguration indicated by the content of the response to the IDENTIFYDEVICE command issued in step S701 from the device side (YES in stepS703), the processing proceeds to step S705. In step S705, the CPU 101determines whether there is a change in the connection configuration ofthe bridges 200 to 310 based on the connection configuration of thestorage devices and the bridges at the time of the previous startup andthe connection configuration indicated by the content of the response tothe IDENTIFY DEVICE command from the device side. The change in theconnection configuration of the bridges include a change in a connectionarrangement of the bridges (e.g., the cascade connection arrangementillustrated in FIG. 1), a removal of any of the bridges 200, 300, and310 or an addition of a new bridge (further, including a change in thedevice connected to the bridge), and the like.

If the CPU 101 determines that there is a change in the connectionconfiguration of the bridges 200, 300, and 310 (YES in step S705), theprocessing proceeds to step S711.

On the other hand, if the CPU 101 determines that there is no change inthe connection configuration of the bridges 200, 300, and 310 (NO instep S705), the processing proceeds to step S708.

In step S708, the CPU 101 determines whether there is a change only inthe combination of the bridge and the storage device based on theconnection configuration of the storage devices and the bridges at thetime of the previous startup and the content of the response to theIDENTIFY DEVICE command. Example of the change only in the combinationof the bridge and the storage device include a case in which at least apart of the storage devices 400 to 403 connected to the bridges 300 and310 is exchanged for each other, and a case in which the bridges 200,300, and 310 are exchanged for each other. For example, in theconfiguration illustrated in FIG. 1, this change corresponds to a casein which the storage device 401 (HDD 2) and the storage device 402 (SSD1) are exchanged for each other, a case in which the bridges 300 and 310are exchanged for each other, and the like.

If the CPU 101 determines that the change is not a change only in thecombination of the bridge and the storage device (NO in step S708), theprocessing proceeds to step S716. The change that is not a change onlyin the combination of the bridge and the storage device corresponds to acase in which at least a part of the storage devices 400 to 403connected to the bridges 300 and 310 is replaced with a new storagedevice, a case in which a new storage device is added, and the like. Instep S716, the CPU 101 issues the initialization processing instructiontargeting the storage devices 400 to 403 to each of the bridges 300 and310 via the SATA controller 110 and the bridge 200, thereby performingthe initialization processing. After that, the processing proceeds tostep S717.

On the other hand, if the CPU 101 determines that the change is a changeonly in the combination of the bridge and the storage device (YES instep S708), the processing proceeds to step S709.

In step S709, the CPU 101 notifies each of the bridges 200, 300, and 310of an inquiry about the current operation mode, the setting information,and the like via the SATA controller 110. Then, the processing proceedsto step S710.

In step S710, the CPU 101 re-sets the mode of each of the bridges 200,300, and 310 based on the connection configuration information stored inthe ROM 102 or the like, the current operation mode and the settinginformation of each of the bridges 200, 300, and 310 that are containedin a content of a response to the notification of the inquiry from eachof the bridges 200, 300, and 310. More specifically, the CPU 101 issuesa mode re-setting instruction to each of the bridges 200, 300, and 310via the SATA controller 110. Thus, the CPU 101 determines the operationmode of each of the bridges 200, 300, and 310 that should be set basedon the connection relationship (connection configuration) between eachof the bridges 200, 300, and 310 and the storage devices 400 to 403 andthe type of each of the storage devices 400 to 403 that have beenacquired in steps S702, S703, S705, and S708. Then, if there is a bridgewith respect to which the determined operation mode and the currentoperation mode are different from each other, the CPU 101 re-sets thedetermined operation mode to this bridge. For the other bridges, the CPU101 maintain the current operation modes thereof because the operationmodes are not changed.

For example, the CPU 101 sets the operation mode and the settinginformation of the bridge 200 to the bridges 300 and 310, and,conversely, sets the operation mode and the setting information of thebridges 300 and 310 to the bridge 200.

As an example, the CPU 101 changes the operation mode of each of thebridges 300 and 310 if determining that, with respect to each of thebridges 300 and 310, the combination of the types of the storage devicesconnected thereto (HDD and SSD) is changed from the combination at thetime of the previous startup.

For example, in the configuration illustrated in FIG. 1, if the storagedevice 401 (HDD 2) and the storage device 402 (SSD 1) are exchanged foreach other, the types of the storage devices connected to each of thebridges 300 and 310 are changed to the HDD and the SSD, thereby becomingthe different types. In the present state, the bridge 200 is in thehybrid mode S503 and the bridges 300 and 310 are each in the mirroringmode S502, and thus mismatch occurs between each of the operation modesof the bridges 200, 300, and 310 and the combination of the exchangedstorage devices if the operation modes remain the same.

Thus, the CPU 101 issues the mode re-setting instruction to each of thebridges 200, 300, and 310, thereby setting the operation mode of each ofthe bridges 300 and 310 so as to change it from the mirroring mode S502to the hybrid mode S503 and setting the operation mode of the bridge 200so as to change it from the hybrid mode S503 to the mirroring mode S502.As a result, matching is maintained between each of the operation modesof the bridges 200, 300, and 310 and the combination of the storagedevices connected thereto.

Even when the change is a change only in the combination of the bridgeand the storage device, the operation mode of each of the bridges 200,300, and 310 is not changed if the combination of the types of thestorage devices connected to each of the bridges 300 and 310 is notchanged. For example, if the combination of the storage device 400 (HDD1) and the storage device 401 (HDD 2) and the combination of the storagedevice 402 (SSD 1) and the storage device 403 (SSD 2) are exchanged foreach other, the storage devices connected to each of the bridges 300 and310 remain the combination of the same type of storage devices.Therefore, the operation modes are not changed, i.e., the operation modeof each of the bridges 300 and 310 is maintained to the mirroring modeS502, and the operation mode of the bridge 200 is maintained to thehybrid mode S503. As a result, the matching is maintained between eachof the operation modes of the bridges 200, 300, and 310 and thecombination of the storage devices connected thereto.

After the CPU 101 ends the processing in step S710, the processingproceeds to step S717. In step S717, the CPU 101 stores the changed modesettings and the like into the ROM 102 or the like as the connectionconfiguration information. Then, the CPU 101 ends the processing.

If the CPU 101 determines that there is a change in the connectionconfiguration of the bridges (YES in step S705), the processing proceedsto step S711. In step S711, the CPU 101 determines whether there is aconnected device based on the content of the response to the IDENTIFYDEVICE command issued in step S701. In other words, the CPU 101determines whether there is a connected device beyond the bridge 200connected to the SATA controller 110.

In step S711, if the CPU 101 determines that there is no connecteddevice beyond the bridge 200 (NO in step S711), the processing proceedsto step S713.

In step S713, the CPU 101 presents an error display on the operationunit 109, indicating that no SATA device can be detected beyond thebridge 200 connected to the SATA controller 110. Then, the processingproceeds to step S717. In step S717, the CPU 101 stores the informationsuch as the connection configuration of the bridges after the changethat has been acquired in step S702 into the ROM 102 or the like. Then,the CPU 101 ends the processing.

On the other hand, in step S711, if the CPU 101 determines that there isa connected device beyond the bridge 200 (YES in step S711), theprocessing proceeds to step S712.

In step S712, the CPU 101 determines whether a SATA device including abridge is connected to the SATA controller 110 in the cascade mannerbased on the content of the response to the IDENTIFY DEVICE commandissued in step S701.

At this time, configuration examples of the cascade connection include aconfiguration in which at least two bridges (200 and 300) and aplurality of devices are connected to the controller 110 in the cascademanner. For example, one possible configuration as this example is thatat least one storage device and the bridge 300 are connected beyond thebridge 200, and a plurality of devices, such as a plurality of storagedevices or at least one storage device and the bridge 310, is connectedbeyond the bridge 300. In this case, a plurality of devices may befurther connected beyond the bridge 310. Further, another example isthat the bridge 300 is connected beyond the bridge 200, and a pluralityof devices, such as a plurality of storage devices or at least onestorage device and the bridge 310, is connected beyond the bridge 300.In this case, a plurality of devices may further be connected beyond thebridge 310.

They are examples of the cascade connection, and the present exemplaryembodiment can be applied to such a wide variety of cascade connections.

In step S712, if the CPU 101 determines that no bridge is connected tothe SATA controller 110 in the cascade manner (NO in step S712), i.e.,determines that only the bridge 200 is connected, the processingproceeds to step S715.

In step S715, the CPU 101 issues the mode re-setting instruction to thebridge 200 via the SATA controller 110, thereby re-setting the operationmode thereof. In other words, the CPU 101 determines the operation modeof the bridge 200 that should be set based on the connectionrelationship (connection configuration) between the bridge 200 and thestorage devices and the type of each of the storage devices that havebeen acquired in steps S702, S703, S705, and sets the determinedoperation mode to the bridge 200. At this time, the CPU 101 sets eitherthe mirroring mode S502 or the hybrid mode S503, assuming that the twostorage devices belonging to the same type or the different types areconnected to the bridge 200.

Needless to say, the CPU 101 may operate so as to re-set the single modeS501 if only one storage device is connected to the bridge 200.

On the other hand, in step S712, if the CPU 101 determines that a bridgeis connected to the SATA controller 110 in the cascade manner (YES instep S712), the processing proceeds to step S714. In the presentexemplary embodiment, assume that the bridge 200 and the like areconnected in the cascade manner in a different connection relationshipfrom FIG. 1.

In step S714, the CPU 101 issues the mode re-setting instruction to thebridge 200 and the like via the SATA controller 110 based on theconnected device information indicated by the content of the response tothe IDENTIFY DEVICE command, thereby re-setting the operation mode ofeach of the bridges. In other words, the CPU 101 determines theoperation mode of each of the bridges that should be set based on theconnection relationship (connection configuration) between each of thebridges and the storage devices and the type of each of the storagedevices that have been acquired in steps S702, S703, S705, S711, andS712, and sets the determined operation mode to each of the bridges.Assume that, at this time, the operation modes set to the bridge 200 andthe like are both the mirroring mode S502 and the hybrid mode S503.Needless to say, the CPU 101 may operate so as to re-set the single modeS501 if only one storage device is connected to the bridge.

In step S716, the CPU 101 causes the bridge 200 and the like to performthe initialization processing on the connected storage devices 400 to403 via the SATA controller 110.

Next, in step S717, the CPU 101 stores the information about each of theconnected devices connected beyond the SATA controller 110 after thechange as the connection configuration information. More specifically,the CPU 101 stores the connection configuration of the bridges and thestorage devices after the change, the operation modes and the settinginformation of the bridge 200 into the ROM 102 or any of the storagedevices 400 to 403 and the like as the connection configurationinformation.

Next, an operation of mode re-setting processing performed by thebridges 200, 300, and 310 will be described with reference to aflowchart illustrated in FIG. 7B. In the present exemplary embodiment,mode re-setting processing performed by the CPU 201 in the bridge 200will be described as one example, but this processing is also performedby each of the other bridges 300 and 310 in a similar manner.

A program running on the CPU 201 regarding the flowchart illustrated inFIG. 7B may be stored in the RAM 203, the ROM 202, or any of the storagedevices 400 to 403.

The processing procedure illustrated in FIG. 7B will be describedassuming that this processing is performed at the time of theinitialization, for example, the startup in the present exemplaryembodiment, but is not limited thereto and may be performed when the CPU201 accesses the connected SATA device, for example, every time the CPU201 attempts this access.

First, in step S721, the CPU 201 confirms whether a SATA device isconnected beyond the SATA host I/Fs 205 and 206 upon receiving thenotification for confirming whether there is a connected device from thehost side via the SATA device I/F 204. As a specific example, the CPU201 issues the ATA command such as the IDENTIFY DEVICE command to thedevice side via each of the SATA host I/Fs 205 and 206, therebyconfirming whether a SATA device is connected.

If there is a response to the IDENTIFY DEVICE command issued in stepS721 from the device side (YES in step S722), the CPU 201 determinesthat a SATA device is connected beyond the SATA host I/Fs 205 and 206.Then, the processing proceeds to step S723.

On the other hand, if there is no response to the IDENTIFY DEVICEcommand issued in step S721 from the device side (NO in step S722), theCPU 201 determines that no device is connected to the SATA host I/Fs 205and 206, and the processing proceeds to step S724.

In step S723, the CPU 201 determines whether the error notificationindicating that no device is connected to the SATA host I/Fs 205 and 206is contained in the response to the IDENTIFY DEVICE command issued instep S721 from the device side.

In step S723, if the CPU 201 determines that the error notification iscontained in the response to the IDENTIFY DEVICE command from the deviceside (YES in step S723), the processing proceeds to step S724.

On the other hand, in step S723, if the CPU 201 determines that theerror notification is not contained in the response to the IDENTIFYDEVICE command from the device side (NO in step S723), the processingproceeds to step S725.

In step S724, the CPU 201 notifies the host side that the current stateis such an error state that no device is connected to the SATA host I/Fs205 and 206. In response to this notification, the main controller 100presents the error display on the operation unit 109, indicating that nodevice is connected to the SATA host I/Fs 205 and 206. After that, theCPU 201 ends the processing. The processing may proceed to step S733instead of being ended, and the CPU 201 may operate so as to store theinformation about the connected device that has been acquired in stepS722 into the ROM 202 as the connection configuration information.

In step S725, the CPU 201 acquires the connected device information bymerging the content of the response to the IDENTIFY DEVICE commandissued in step S721 and the information about the bridge 200 itself. Instep S725, the CPU 201 further notifies the host side of the connecteddevice information via the SATA device I/F 204. Then, the processingproceeds to step S726.

In step S726, the CPU 201 compares the content of the response to theIDENTIFY DEVICE command issued in step S721 from the device side and theconnection configuration at the time of the previous startup that hasbeen stored in the ROM 202 during the initialization processingillustrated in FIG. 6B. The connection configuration and the like at thetime of the previous startup refers to the connection configuration ofthe storage devices 400 to 403 and the bridges 200, 300, and 310.

If the CPU 201 determines that there is no change between the connectionconfiguration of the bridges and the storage devices at the time of theprevious startup and the content of the response to the IDENTIFY DEVICEcommand issued in step S721 (NO in step S726), the processing proceedsto step S733. In step S733, the CPU 201 stores the information about theconnected devices that has been acquired in step S722 into the ROM 202as the connection configuration information. The CPU 201 may operate soas to end the processing instead of the processing proceeding to stepS733.

Here, the change in the connection configuration refers to a change inthe connection configuration among the bridges or the connectionconfiguration between the bridges and the storage devices, an exchangeof at least a part of the storage devices connected to the bridges foreach other, a removal of the storage device or an additional connectionof a new storage device, and the like. Further, the change in theconnection configuration also includes, for example, a case in which apart of the storage devices connected to the bridges is replaced with anew storage device.

On the other hand, if the CPU 201 determines that there is a changebetween the connection configuration of the storage devices and thebridges at the time of the previous startup and the content of theresponse to the IDENTIFY DEVICE command issued in step S721 (YES in stepS726), the processing proceeds to step S728.

In step S728, the CPU 201 determines whether the change is a change onlyin the combination of the bridge and the storage device based on theconnection configuration of the storage devices and the bridges at thetime of the previous startup and the content of the response to theIDENTIFY DEVICE command issued in step S721. Examples of the change onlyin the combination of the bridge and the storage device include a casein which at least a part of the storage devices 400 to 403 connected tothe bridges 300 and 310 is exchanged for each other, and a case in whichthe bridges 200, 300, and 310 are exchanged for each other.

If the CPU 201 determines that the change is a change only in thecombination (YES in step S728), the processing proceeds to step S729.

On the other hand, if the CPU 201 determines that the change is not achange only in the combination (NO in step S728), the processingproceeds to step S731. The change that is not a change only in thecombination of the bridge and the storage device corresponds to a casein which at least a part of the storage devices 400 to 403 connected tothe bridges 300 and 310 is replaced with a new storage device, a case inwhich the storage device is removed, and a case in which a device suchas a new storage device is added.

In step S729, the CPU 201 receives the notification of the inquiry aboutthe operation mode, the setting information, and the like to each of thebridges 200, 300, and 310 that has been transmitted from the maincontroller 100 in step S709. Further, in step S729, the CPU 201 notifiesthe bridges 300 and 310 of the inquiry about the operation mode, thesetting information, and the like to the bridges 300 and 310 via theSATA host I/Fs 205 and 206. Further, the CPU 201 acquires theinformation about the connected devices by merging the content of theresponse to the inquiry about the operation mode, the settinginformation, and the like to the bridges 300 and 310 from each of thebridges 300 and 310, and the operation mode and the setting informationof the bridge 200 itself. Then, the CPU 201 notifies the host side ofthe connected device information via the SATA device I/F 204. Then, theprocessing proceeds to step S731.

In step S731, the CPU 201 receives the mode re-setting instruction,which has been the response to the connected device information in stepS714 or S715, from the host side via the SATA device I/F 204. Further,in step S731, the CPU 201 identifies the content of the mode settinginstruction addressed to the bridge 200 itself and the contents of themode setting instructions addressed to the devices connected to the SATAhost I/Fs 205 and 206 from the received mode setting instruction fromthe host side. Further, the CPU 201 notifies the bridges 300 and 310 ofthe identified contents of the mode re-setting instructions addressed tothe devices connected to the SATA host I/Fs 205 and 206 (bridges 300 and310 in FIG. 1) via the SATA host I/Fs 205 and 206. With thisnotification, the operation modes of the bridges 300 and 310 are re-set.Further, the CPU 201 sets the operation mode of the bridge 200 itselfbased on the identified mode setting instruction addressed to the bridge200. Then, the processing proceeds to step S732.

In step S732, the CPU 201 receives the re-initialization processinginstruction targeting the storage devices from the host side (S716) viathe SATA device I/F 204. Further, in step S732, the CPU 201 notifies thedevices connected to the SATA host I/Fs 205 and 206 of the receivedre-initialization processing instruction, thereby performing theinitialization processing on the storage devices. Then, the processingproceeds to step S733.

In step S733, the CPU 201 stores the operation modes of the bridge 200and the like re-set in step S731, the information about the connecteddevices confirmed in step S721, and the like into the ROM 202 as theconnection configuration information.

In this manner, the mode re-setting processing by the bridge 200 iscompleted.

The initialization processing is also performed by the other bridges 300and 310 connected to the bridge 200 in a similar manner.

As described above, the storage system according to the presentexemplary embodiment includes a controller (110), a first bridge (200)connected to the controller, and a second bridge (300) and a thirdbridge (310) connected to the first bridge. Further, the storage systemincludes a plurality of storage devices (400 to 403) each connected toany of the first to third bridges. At least one of the controller andthe first to third bridges includes a storage unit (102, 202, 302, or312), a determination unit (steps S703 to S708 and S728), and are-setting unit (steps S710, S714, and S731). The storage unit storesinformation including a connection configuration of the first to thirdbridges and the storage devices. The determination unit determines basedon the information stored in the storage unit whether the connectionconfiguration of the first to third bridges and the plurality of storagedevices connected thereto is changed from the connection configurationat the time of a previous operation (at the time of initialization, forexample, a startup or at the time of access to the device). If thedetermination unit determines that the connection configuration ischanged, the re-setting unit re-sets an operation mode of each of thefirst to third bridges based on this change in the connectionconfiguration.

Therefore, according to the present exemplary embodiment, if theconnection configuration of the bridges connected in the cascade mannerand the plurality of storage devices connected beyond that is changedfrom the connection configuration at the time of the operation such asthe previous startup, the operation mode of each of the bridges isre-set based on this change. As a result, even when there is a change inthe connection configuration, such as connecting the storage device byexchanging it from the connection configuration at the time of theoperation such as the previous startup, the mismatch can be preventedbetween the operation mode of the bridge and the storage deviceconnected to this bridge, and the storage system can normally continuethe operation.

Further, even when the connection configuration of the bridges, and theplurality of storage devices connected to the bridges are changed fromthose at the time of the operation such as the previous startup, theoperation mode of each of the bridges is also re-set based on thischange. Therefore, the storage system can further flexibly handle thechange in the connection configuration.

The processing procedures illustrated in the flowcharts of FIGS. 6A and7A are assumed to be performed by the CPU 101 in the main controller100, but may be set so as to be performed by a CPU prepared in the SATAcontroller 110.

Further, a control apparatus to which a nonvolatile storage deviceincluding a semiconductor memory and a nonvolatile storage deviceincluding a disk can be connected, or a control method therefor (110,200, or 300) according to another embodiment of the present disclosureincludes a setting unit configured to set an operation mode or settingsteps (steps S710, S714, and S731) for setting an operation mode. Thesetting unit (setting steps) sets a predetermined operation mode setbased on connections of the nonvolatile storage device including thesemiconductor memory and the nonvolatile storage device including thedisk to the control apparatus. Further, if a plurality of the storagedevices each including the semiconductor memory is connected to thecontrol apparatus and the nonvolatile storage device including the diskis not connected to the control apparatus, the setting unit (settingsteps) sets an operation mode regarding mirroring that is different fromthe predetermined operation mode, in which the plurality of connectednonvolatile devices is mirrored. Similarly, if the storage deviceincluding the semiconductor memory is not connected to the controlapparatus and a plurality of the nonvolatile storage devices eachincluding the disk is connected to the control apparatus, the settingunit (setting steps) sets the operation mode regarding the mirroringthat is different from the predetermined operation mode.

OTHER EMBODIMENTS

The present invention can also be embodied by processing that supplies aprogram for implementing one or more functions of the above-describedexemplary embodiment to a system or an apparatus via a network or astorage medium, and causes one or more processors in a computer of thissystem or apparatus to read out and execute the program. Further, thepresent invention can also be embodied by a circuit (e.g., anapplication specific integrated circuit (ASIC)) for realizing one ormore functions.

Embodiment(s) of the present disclosure can also be realized by acomputer of a system or apparatus that reads out and executes computerexecutable instructions (e.g., one or more programs) recorded on astorage medium (which may also be referred to more fully as a‘non-transitory computer-readable storage medium’) to perform thefunctions of one or more of the above-described embodiment(s) and/orthat includes one or more circuits (e.g., application specificintegrated circuit (ASIC)) for performing the functions of one or moreof the above-described embodiment(s), and by a method performed by thecomputer of the system or apparatus by, for example, reading out andexecuting the computer executable instructions from the storage mediumto perform the functions of one or more of the above-describedembodiment(s) and/or controlling the one or more circuits to perform thefunctions of one or more of the above-described embodiment(s). Thecomputer may comprise one or more processors (e.g., central processingunit (CPU), micro processing unit (MPU)) and may include a network ofseparate computers or separate processors to read out and execute thecomputer executable instructions. The computer executable instructionsmay be provided to the computer, for example, from a network or thestorage medium. The storage medium may include, for example, one or moreof a hard disk, a random-access memory (RAM), a read only memory (ROM),a storage of distributed computing systems, an optical disk (such as acompact disc (CD), digital versatile disc (DVD), or Blu-ray Disc (BD)™),a flash memory device, a memory card, and the like.

While the present invention has been described with reference toexemplary embodiments, it is to be understood that the scope of theinvention is not limited to the disclosed exemplary embodiments. Thescope of the following claims is to be accorded the broadestinterpretation so as to encompass all such modifications and equivalentstructures and functions.

This application claims the benefit of Japanese Patent Application No.2018-041887, filed Mar. 8, 2018, which is hereby incorporated byreference herein in its entirety.

What is claimed is:
 1. A storage system, comprising: a controller; afirst bridge connected to the controller; a second bridge and a thirdbridge connected to the first bridge; a plurality of storage deviceseach connected to the second bridge or the third bridge; a memoryconfigured to store information including a connection configuration ofthe plurality of storage devices; a determination unit configured todetermine whether the connection configuration of the plurality ofstorage devices has been changed, based on the information stored in thememory; and a re-setting unit configured to re-set at least one of anoperation mode of the first bridge, an operation mode of the secondbridge, or an operation mode of the third bridge based on the connectionconfiguration after the change, based on the determination that theconnection configuration has been changed.
 2. The storage systemaccording to claim 1, wherein each of the plurality of storage devicesis a first type storage device or a second type storage device, whereinthe memory stores the type of each of the plurality of storage devicesas part of the information, and wherein the determination unitdetermines whether a subset of the plurality of storage devices which isconnected to the second bridge is comprised of the same type of storagedevices or different types of storage devices and whether a subset ofthe plurality of storage devices connected to the third bridge iscomprised of the same type of storage devices or different types ofstorage devices.
 3. The storage system according to claim 2, wherein thefirst type storage device is a storage device storing data not requiringa higher access speed, and the second type storage device is a storagedevice storing data requiring a higher access speed.
 4. The storagesystem according to claim 2, wherein the re-setting unit re-sets theoperation mode of the second bridge and the operation mode of the thirdbridge to be a first operation mode in a case where the subset ofstorage devices connected to the second bridge is determined to becomprised of the same type of storage devices, and the subset of storagedevices connected to the third bridge is determined to be comprised ofthe same type of storage devices, and wherein the re-setting unitre-sets the operation mode of the second bridge and the operation modeof the third bridge to be a second operation mode in a case where thesubset of storage devices connected to the second bridge is determinedto be comprised of different types of storage devices and the subset ofstorage devices connected to the third bridge is determined to becomprises of different types of storage devices.
 5. The storage systemaccording to claim 4, wherein the first operation mode is a mirroringmode, and the second operation mode is a hybrid mode.
 6. The storagesystem according to claim 2, wherein the determination unit issues anotification for confirming the connection configuration of the storagedevices to each of the first, second and third bridges, and determineswhether the connection configuration of the storage devices has beenchanged from a state before the system was started up, based on acontent of a response to the notification for confirming the connectionconfiguration of the storage devices, received from each of the first,second and third bridges, and wherein the re-setting unit issues, in acase where the connection configuration of the storage devices isdetermined to have been changed, a notification for confirming theoperation mode to each of the first, second and third bridges, andre-sets the operation mode of each of the first, second and thirdbridges based on a content of a response to the notification forconfirming the operation mode, from each of the first, second and thirdbridges.
 7. The storage system according to claim 2, wherein thedetermination unit issues a notification for confirming a storage deviceconnected to other bridges to each of the other bridges, and determineswhether the connection configuration of the first, second and thirdbridges has been changed from the connection configuration at the timeof a previous operation, based on the information stored in the memoryand a content of a response to the notification for confirming thedevice, from each of the other bridges, and wherein the re-setting unitissues, in a case where the determination unit determines that theconnection configuration has been changed from the connectionconfiguration at the time of the previous operation, a notification forconfirming the operation mode to each of the other bridges, and re-setsthe mode of each of the first, second and third bridges based on acontent of a response to the notification for confirming the operationmode, from each of the other bridges.
 8. A storage system, comprising: acontroller; at least first and second bridges; a plurality of devicesconnected to the controller in a cascade manner; a memory configured tostore information including a connection configuration of the first andsecond bridges and the plurality of devices; a determination unitconfigured to determine whether the connection configuration of thefirst and second bridges and the plurality of devices has been changedfrom the connection configuration at the time of a previous operation,based on the information stored in memory; and a re-setting unitconfigured to re-set an operation mode of each of the first bridge andthe second bridge to correspond with the connection configuration afterthe change in the connection configuration, in a case where thedetermination unit determines that the connection configuration has beenchanged.
 9. The storage system according to claim 8, wherein theplurality of devices includes a storage device.
 10. A control apparatusto which a nonvolatile storage device including a semiconductor memoryand a nonvolatile storage device including a disk can be connected, thecontrol apparatus comprising: a setting unit configured to set apredetermined operation mode based on connections of the nonvolatilestorage device including the semiconductor memory and the nonvolatilestorage device including the disk, to the control apparatus, and set anoperation mode regarding mirroring that is different from thepredetermined operation mode, in which the plurality of connectednonvolatile devices is mirrored, in a case where a plurality of thestorage devices each including the semiconductor memory is connected tothe control apparatus and the nonvolatile storage device including thedisk is not connected to the control apparatus, or in a case where thestorage device including the semiconductor memory is not connected tothe control apparatus and a plurality of the nonvolatile storage deviceseach including the disk is connected to the control apparatus.